Advanced process control (APC) systems are presently used to implement feedback control in integrated circuit (IC) manufacturing processes. The IC manufacturing processes typically includes a wafer processing tool (e.g., scanner or stepper) suitable for forming a series of desired pattern layers in a wafer (e.g., silicon wafer) in order to create an IC device. The fabrication process may be governed by a number of process control parameters applied by the process tool at each step of the fabrication process. These process control parameters may include, but are not limited to, the translation rate of the wafer across the process tool (scanner or stepper), the rotation angle of the wafer with respect to the process tool, the dose of radiation applied to the wafer by the process tool, the magnification of the source pattern (reticle) by the process tool, and the focus source pattern on the wafer by the process tool. The APC system automatically controls one or more of these process control parameters, in real time or near real time, to counteract errors measured in the scanned pattern as the pattern formation process proceeds from layer to layer.
A metrology system is used to monitor the patterns scanned onto the wafers as the IC fabrication process proceeds so that adjustments can be made to counteract errors that may develop during the manufacturing process. More specifically, the metrology system typically determines the positions of certain reference marks (metrology targets) disposed in each process layer of a device. Misalignment between the reference marks from layer to layer, known as “overlay error,” may be measured and used to compute the feedback parameters used to control the process tool, allowing for ongoing feedback regulation of the fabrication process.
It should be appreciated, however, that the overlay errors are indicative of, but are not identical to, the specific process control parameters used by the scanner or stepper to control the IC fabrication process. In particular, the overlay errors represent layer-to-layer positional misalignment in between two metrology reference marks, whereas the process control parameters (e.g., translation, rotation, dose, magnification and focus) govern the operation of the scanner or stepper producing the layers. Therefore, a process control model is ordinarily used to compute prospective corrections to the process control parameters (correctables) based on the measured overlay error.
While this is a highly successful IC fabrication technique, the computation of the control parameters has traditionally been a “black box” to the technicians, with the inner workings of the APC system, such as the underlying overlay errors and measured parameters, unavailable for view or analysis. This makes it difficult for the technicians to understand how the IC fabrication systems are behaving to help identify problematic process control parameters and develop model changes to counteract problems and develop improvements to the feedback control system. As a result, errors within an APC system can be difficult to diagnose and correct.
There is, therefore, a continuing need for methods and systems for monitoring and controlling feedback control parameters used in IC device manufacture. More particularly, there is a continuing need for techniques for exposing information about the inner workings of APC systems used for automatic feedback control of process control parameters in integrated circuit device fabrication.